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Competitive Programmable Logic Power Measurements
Power has become the new battleground for programmable logic companies as demand for low-power design grows rapidly and many programmable logic device (PLD) vendors work to improve device power characteristics. In fact, several suppliers of programmable logic devices claim low-power superiority. However, using vendor published data, power estimation tools, and real silicon measurements across competitive PLDs, the comparison reveals that there is only one winner. With power consumption as low as 5 µW, Actel's ultra-low-power IGLOO® FPGAs are the industry's leading low-power programmable logic devices.
IGLOO FPGAs support from 15 k up to 3 M system gates, up to 620 I/Os, up to 502 kbits of SRAM, 1 kbit of FlashROM (user nonvolatile memory), and up to 6 PLLs. The 30 k gate logic density seems to be most common for small density programmable logic devices and was chosen for comparison.
Comparing 30 k Gate Programmable Logic Devices
The following diagrams show comparisons between small density PLD devices of about 30 k system gates (256 macrocells or 300 equivalent logic elements).
| Vendor |
Device Family |
Part Number |
| Actel Corporation |
IGLOO FPGA |
AGL030 |
| Altera® Corporation |
MAX® IIZ CPLD |
EPM240Z |
| Xilinx®, Inc. |
CoolRunner™-II CPLD |
XC2C256 |
MAX is a registered trademark of Altera Corporation. CoolRunner is a registered trademark of Xilinx, Inc.
Static Power
The figure below shows the static power consumption for competing CPLDs and IGLOO FPGA. Based on vendor datasheets, the Actel IGLOO FPGAs provide 10X lower static power, making it ideal for power-conscious and portable applications where battery life is most important.
Static Power over Temperature
Actel's IGLOO FPGA widens its power advantage when operated at high temperature. The figure below shows the static power consumption for competing CPLDs and the Actel IGLOO FPGA at 25°C and 70°C, based on vendor datasheets. As shown, the IGLOO FPGA provides 10X lower static power at 25°C and over 30X lower static power at 70°C, making it the ultimate solution for power-sensitive applications operated at typical and high temperatures.
Dynamic Power
Unlike competing CPLDs in the same logic density that use a 1.8 V core, IGLOO FPGAs use 1.2 V core operation, which significantly lowers dynamic power. The graph below shows the power consumption (in mW) versus frequency for small density PLDs when using the same design.
As shown in the diagram, the IGLOO FPGA consumes 10X less power than competing devices over a range of frequencies.
Total Power
Accounting for total power consumption over time, the diagram below shows several different power profiles: 95% static and 5% dynamic, 80% static and 20% dynamic, 50% static and 50% dynamic, and 5% static and 95% dynamic. The total power consumption represents the average power consumption over time—when the dynamic power portion is larger, the total power increases accordingly.
Across all these power profiles, Actel IGLOO FPGAs provide significant power reduction, which optimizes the programmable logic power consumption in the system.
IGLOO FPGAs support up to 3 M system gates, up to 620 I/Os, up to 502 of kbits SRAM, 1 kbit of FlashROM (user nonvolatile memory), and up to 6 PLLs. The 600 k gate logic density seems to be common across FPGA vendors, which made it favorable to use for comparison.
Comparing 600 k Gate FPGA Devices
The following diagrams show comparisons between FPGAs of about 600 k system gates or 6,000 equivalent logic elements.
| Vendor |
Device Family |
Part Number |
| Actel Corporation |
IGLOO |
AGL600 |
| Altera Corporation |
Cyclone® III |
EP3C5 |
| Xilinx, Inc. |
Spartan™-3AN |
XC3S400AN |
Cyclone is a registered trademark of Altera Corporation. Spartan is a registered trademark of Xilinx, Inc.
Static Power
The figure below shows static power consumption for the competing FPGAs. Based on vendor datasheets, Actel's IGLOO FPGA consumes only 34 µW and provides up to 1,700X lower static power than competing FPGAs, making it ideal for power-conscious applications requiring larger logic density and FPGA features.
Static Power over Temperature
Actel's IGLOO FPGA power advantage superiority continues when operating at high temperature. The figure below shows the static power consumption for the competing FPGAs at 25°C, 70°C, and 85°C, based on vendor estimation tools. As shown, IGLOO FPGAs are better than competing FPGAs by 100 mW at 85°C. Actel's IGLOO FPGA static power is lower by orders of magnitude across a range of temperatures, making it best for power-sensitive applications that operate at high temperatures.
Dynamic Power
The graphs below show the power consumption of AGL600 (in mW) versus the competing FPGAs when using the same design. IGLOO FPGAs are consistently superior across a range of frequencies and show more than 100 mW better power consumption than competing FPGAs.
Total Power
Accounting for total power consumption over time, the diagram below shows several different power profiles: 95% static and 5% dynamic, 80% static and 20% dynamic, 50% static and 50% dynamic, and 5% static and 95% dynamic. The total power consumption represents the average power consumption over time—when the dynamic power portion is larger, the total power increases accordingly.
Actel IGLOO devices are superior in any mode and demonstrate significant power reduction across all power profiles, which significantly lowers the FPGA power consumption in the system and extends battery life in portable applications.
