Synopsys Synplify Pro AE
Synopsys® Synplify Pro® AE synthesis tool is integrated into
Libero SoC and IDE, enabling you to target and fully optimize your HDL design for any Microsemi device. As with other Libero tools, you can launch Synplify Pro AE directly from the Libero
Project Manager.
Synplify Pro AE is a standard offering in all Libero editions.
Synplify Pro AE User Interface
Key features of Synplify Pro AE are listed below. Synplify Pro AE is now available in Libero Evaluation, Gold, and Platinum license editions. All Microsemi devices are supported with Synplify Pro AE.
- Synopsys's Proprietary Behavior Extracting Synthesis Technology (BEST™) Algorithms
- Integrated Module Generation and Mapping
- SCOPE Multi-Level Design Constraints
- Language-Sensitive Editor
- Intuitive Use Model with Intelligent Defaults
- Direct Synthesis Technology
- Third-Party Tool Integration
- Advanced Register Detection
- Hierarchy Browser Display
- TCL Scripting
- HDL Analyst® Solution
- Netlist Hierarchy
- Comprehensive Mixed HDL Language Support
- MultiPoint™ Synthesis
- Retiming/register balancing
- FSM Explorer
- Graphical State Machine Viewer
- Probe Point Creation
- Generic Cross-Probing of Critical Paths
- Gated Clock Conversion
- Multiple Implementations
Application Notes
User's Guides and Manuals
License Information
Release Notes
FAQ
Additional Design Development Tools
