Design Flow 

Actel's Flagship FPGA Development Software

Libero Integrated Design Environment (IDE) is Actel's comprehensive software toolset for designing with all Actel FPGAs. From design, synthesis and simulation, through floorplanning, place-and-route, timing constraints and analysis, power analysis, and program file generation, Libero IDE manages the entire design flow quickly and efficiently. Libero's second generation SmartDesign provides an efficient methodology for creating complete simple and complex processor based System on Chip (SoC) designs with ease.

Libero IDE provides full power optimization and analysis tools for Actel's low-power flash FPGA families, including IGLOO, ProASIC3L, and IGLOO PLUS, the latest addition to the low power family.

Libero IDE offers the latest and best-in-class FPGA development tools from leading EDA vendors such as Mentor Graphics, SynaptiCAD, and Synplicity. These tools, combined with Actel developed tools allow you to quickly and easily manage your Actel FPGA designs. An intuitive user interface and powerful design manager guides you through the process while organizing design files and seamlessly managing exchanges between the various tools.

Libero IDE Software Features:

• Powerful project and design flow management
• Full suite of integrated design entry tools and methodologies:
  • SmartDesign graphical SoC design creation with automatic abstraction to HDL
  • Core Catalog and Configuration
  • HDL and HDL templates
  • "User-defined block" creation flow for design re-use
  • ViewDraw Schematic Capture
  • Actel cell libraries
• Synplify/Synplify Pro AE synthesis fully optimizes Actel FPGA device performance and area utilization
• Synplify DSP AE performs high-level DSP optimizations within a Simulink environment
• Test-bench generation including analog stimulus via WaveFormer Lite AE. Advanced analog stimulus functionality is available from SynaptiCAD.
• ModelSim VHDL or Verilog behavioral, post-synthesis and post-layout simulation capability
• Designer physical design implementation, floorplanning, physical constraints, and layout
• Timing- and power-driven place-and-route
• SmartTime environment for timing constraint management and analysis
• SmartPower provides comprehensive power analysis for actual and "what if" power scenarios
• Interface to FlashPro and Silicon Sculptor programming software
• Identify AE debugging software for Actel flash designs
• Silicon Explorer debugging software for Actel antifuse designs
• Supported on Windows and Linux operating systems

Libero IDE Design Flow

The following chart shows the devices that are currently supported by Actel for new designs. If the product that you are looking for is not listed here, refer to Legacy or Discontinued Devices page or contact Technical Support.

Product Family	Device	Licenses/Editions
		Gold	Platinum	Eval
Fusion	AFS090, AFS250, AFS600, AFS1500, U1AFS250, U1AFS600, P1AFS600, P1AFS1500
M1 Fusion	M1AFS250, M1AFS600, M1AFS1500
M7 Fusion	M7AFS600
IGLOO PLUS (1.2 V / 1.5 V)	AGLP030, AGLP060, AGLP125
IGLOO (1.2 V / 1.5 V)	AGL015, AGL030, AGL060,AGL125, AGL250, AGL600, AGL1000, AGLE600
	AGLE3000
M1 IGLOO (1.2 V / 1.5 V)	M1AGL250, M1AGL600, M1AGL1000
ProASIC3L	A3P250L, A3P600L, A3P1000L
	A3PE3000L
M1 ProASIC3L	M1A3P600L
ProASIC3	A3P015, A3P030, A3P060, A3P125, A3P250, A3P400, A3P600, A3P1000, A3PE600, A3PE1500
	A3PE3000
M1 ProASIC3	M1A3P250, M1A3P600, M1A3P1000, M1A3PE1500
	M1A3PE3000
M7 ProASIC3	M7A3P1000
ProASICPLUS	APA075, APA150, APA300, APA450, APA600, APA750, APA1000
Axcelerator	AX125, AX250, AX500, AX1000
	AX2000
SX-A	A54SX08A, A54SX16A, A54SX32A, A54SX72A
eX	eX64, eX128, eX256
MX	A40MX02, A40MX04, A42MX09, A42MX16, A42MX24, A42MX36
RTAX-S	RTAX250S, RTAX1000S
	RTAX2000S, RTAX4000S
RTSX-SU	RTSX32SU, RTSX72SU