Protocol has experience designing with AntiFuse, SRAM and flash-based FPGAs as well as standard cell and custom ASIC designs using Verilog and VHDL.

• Functional Specification Development
• HDL Coding and Synthesis
• Test-bench Development and Verification
• Timing and Performance Analysis
• Design Optimization for Performance, Density and Power
• IP Porting, Development and Integration
• FPGA and ASIC Consolidation and Migration

Protocol has developed hundreds of designs targeting multiple FPGA and ASIC technologies.

• Custom Algorithms and Processors
• DSP Algorithms
• Memory Controllers
• Device Controllers
• Bus Interfaces and Bridging