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Lowest cost solution with enhanced I/O capabilities
Actel's innovative ProASIC3 nano low-cost, low-power FPGAs bring a new level of value and flexibility to high volume markets. When measured against the typical project metrics of performance, cost, flexibility and time to market, the ProASIC3 nano devices provide an attractive alternative to ASICs and application-specific standard products (ASSPs) in fast moving or highly competitive markets. Customer driven total system cost reduction was a key design criteria for the ProASIC3 nano program. Reduced device cost, availability of Known Good Die, a single chip implementation, and a broad selection of small-footprint packages, all contribute to lower total system costs.
Key Features
- Wide selection of low-cost, small footprint packages
- Known Good Die program
- Enhanced commercial temperature range
- Zero lead time on selected devices
- Selectable Schmitt trigger inputs
- Hot-swappable and cold-sparing I/Os
- Cost-optimized, reprogrammable, and nonvolatile
- 1,024 bits of user flash memory
- Single-chip and live at power-up
- In-system programming (ISP) and security
Product Table
| ProASIC3 nano Devices |
A3PN010 |
A3PN0151 |
A3PN020 |
|
A3PN060 |
A3PN125 |
A3PN250 |
ProASIC3 nano-Z
Devices1 |
|
|
|
A3PN030Z1 |
A3PN060Z1 |
A3PN125Z1 |
A3PN250Z1 |
| System Gates |
10,000 |
15,000 |
20,000 |
30,000 |
60,000 |
125,000 |
250,000 |
| Typical Equivalent Macrocells |
86 |
128 |
172 |
256 |
512 |
1,024 |
2,048 |
| VersaTiles (D-flip-flops) |
260 |
384 |
520 |
768 |
1,536 |
3,072 |
6,144 |
| RAM kbits (1,024 bits)2 |
— |
— |
— |
— |
18 |
36 |
36 |
| 4,608-Bit Blocks2 |
— |
— |
— |
— |
4 |
8 |
8 |
| FlashROM Bits |
1,024 |
1,024 |
1,024 |
1,024 |
1,024 |
1,024 |
1,024 |
| Secure (AES) ISP2 |
— |
— |
— |
— |
Yes |
Yes |
Yes |
| Integrated PLLs in CCCs2 |
— |
— |
— |
— |
1 |
1 |
1 |
| VersaNet Globals |
4 |
4 |
4 |
6 |
18 |
18 |
18 |
| I/O Standards |
Std., Hot Swap |
Std., Hot Swap |
Std., Hot Swap |
Std., Hot Swap |
Std., Hot Swap |
Std., Hot Swap |
Std., Hot Swap |
| I/O Banks (+JTAG) |
2 |
3 |
3 |
2 |
2 |
2 |
4 |
| Maximum User I/Os |
34 |
49 |
49 |
77 |
71 |
71 |
68 |
| Speed Grades |
Std., -1, -2 |
Std., -1, -2 |
Std., -1, -2 |
Std., -1, -2 |
Std., -1, -2 |
Std., -1, -2 |
Std., -1, -2 |
| Temperature Grades |
C, I |
C, I |
C, I |
C, I |
C, I |
C, I |
C, I |
| Single-Ended I/O |
| Known Good Die |
34 |
— |
52 |
83 |
71 |
71 |
68 |
| QN48 (6x6 mm) |
34 |
|
|
34 |
|
|
|
| QN68 (8x8 mm) |
|
49 |
49 |
49 |
|
|
|
| VQ100 (14x14 mm) |
|
|
|
77 |
71 |
71 |
68 |
- Notes:
-
- Not recommended for new designs. Click here for details.
- A3PN030 and smaller devices do not support this feature.
For higher densities and additional features, refer to the ProASIC3 low-cost, low-power FPGAs.
Globalization and removal of trade barriers have lead to increased competition in the manufacturing and marketing of electronic devices. Actel's ProASIC3 nano low-cost, low-power FPGAs are specifically optimized for consumer, industrial, medical, and other high-volume, cost-sensitive applications. Advanced packaging enables devices to utilize existing pick and place machines as well as standard low cost board assembly procedures using packages as small as 6x6 mm. In most cases, all of these small footprint packages are routable with 2-layer boards reducing both material and labor costs. Configurable on-the-fly through in-system programming of the flash-based fabric, enable value-add enhancements and product differentiation to be made or allows the end device to adapt to changing standards.
Enhanced I/O functionality ensures multiple standards with mixed voltage levels typically found in power sensitive or battery powered designs can be addressed with a single device. ProASIC3 nano devices support Schmitt trigger inputs and are hot-swappable. The Schmitt trigger input delivers greater noise immunity in the circuit, enabling designers to safely identify an input signal that rises slowly, such as a keyboard or touchpad. The hot-swap capability offers designers the flexibility to maintain direct system connection while powering up.
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