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| Cortex™-M3: |
Specifically developed to provide a high-performance, low-cost platform for a broad range of applications including microcontrollers, automotive body systems, industrial control systems and wireless networking, the ARM Cortex-M3 32-bit processor in a SmartFusion intelligent mixed signal FPGA is implemented as hard-gate on-chip infrastructure, so fabric tiles are all available for your IP cores and custom circuitry. |
| Cortex-M1: |
The first ARM processor developed specifically for implementation
in FPGAs. ARM Cortex-M1 is available without license fees or royalties
for use in Microsemi M1-enabled FPGA families: IGLOO®, ProASIC®3, ProASIC3L, and Fusion devices. |
| CoreMP7: |
The Microsemi CoreMP7 is a soft IP version of the ARM7TDMI-S™ that
is optimized for use in Microsemi M7 ProASIC3 flash-based and Fusion mixed signal
FPGAs. CoreMP7 is available with no license fees or royalties—bringing
ARM7 to the masses. |
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| Core8051: |
Core8051 is 8051 code compatible so designers can take advantage
of existing code to shorten their design time. This free core is fast
at one clock per instruction, and includes the standard 8051 peripherals. |
| Core8051s: |
Core8051s is an implementation of the 8051 with an APB interface
added to the SFR space. The free Core8051s executes one instruction
per clock, is 8051 instruction compatible, and works with existing
8051 tools. |
 Small Soft Micro
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| CoreABC: |
CoreABC is the smallest and first RTL-programmable soft micro available
for FPGAs. The free controller can be implemented in as few as 241
tiles, and can be used in the smallest Microsemi devices. |
LEON3 Processor Core
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| LEON3: |
LEON3 is a 32-bit processor based on the SPARC V8 architecture, which
is optimized for use in Microsemi FPGAs. A fault-tolerant version of the
LEON3 processor is available for system critical applications. |
On-Chip Bus Interface
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| AMBA: |
Microsemi supplies a full range of subsystem IP cores including: AMBA
bus interfaces, memory controllers, timers, and others. The subsystem
IP connects to the processor via the AMBA bus and is available for
free in the Libero® IDE Catalog and CoreConsole. |
