Complete device information is compiled into handbooks for Actel IGLOO nano low-power FPGA devices. Either download the complete handbook or choose from the individual sections listed below. The handbook introduction document provides additional information about this new document type.

IGLOO nano Low-Power Flash FPGAs Handbook

17 MB

3/2010

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[ Expand All / Collapse All ]

[+] Section 1: Datasheets

[+] Section 2: Low-Power Flash Technology and Flash*Freeze

[+] Section 3: Global Resources and Clock Conditioning

[+] Section 4: Embedded Memories

[+] Section 5: I/O Descriptions and Usage

[+] Section 6: Packaging and Pin Descriptions

[+] Section 7: Programming & Security

[+] Section 8: Boundary Scan & UJTAG

[+] Section 9: Board-Level Requirements

[+] Section 10: Design Tutorials, User's Guides, and Macro Libraries

[+] Section 11: Application Notes

[+] Section 12: Application Briefs

	High-Volume nano FPGAs White Paper		415 KB	11/2008	Click on the to rate this document
	Power-Aware FPGA Design White Paper			2/2009	Click on the to rate this document
	FPGA Reliability and the Sunspot Cycle White Paper			9/2009	Click on the to rate this document
	Putting Low Power and Flexibility Where It Matters Most: Handheld Portable Applications White Paper			11/2009	Click on the to rate this document

	Corporate Brochure		2 MB	8/2009	Click on the to rate this document
	IGLOO Low-Power Flash FPGAs Brochure		567 KB	4/2009	Click on the to rate this document
	Industry's Lowest Power FPGAs Fact Sheet		143 KB	10/2008	Click on the to rate this document
	Power Top Ten		173 KB	10/2008	Click on the to rate this document
	Total System Power Brochure		482 KB	10/2008	Click on the to rate this document
	Single-Event Effects in FPGAs		306 KB	10/2007	Click on the to rate this document
	The Importance of Design Security Brochure		242 KB	4/2005	Click on the to rate this document

Actel Libero IDE Quick Start Guide & Tutorial  IGLOO nano VHDL Design Files (ZIP, 451 KB, 12/08) IGLOO Icicle Verilog Design Files (ZIP, 549 KB, 12/08) IGLOO Icicle VHDL Design Files (ZIP, 892 KB, 12/08)

2 MB

12/2008

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