Actel Fusion®: Unlock Creativity. Simplify Implementation. No Compromises.
The Actel Fusion Programmable System Chip (PSC) is the world's first
mixed-signal FPGA, integrating configurable analog, large flash memory
blocks, comprehensive clock generation and management circuitry, and
high performance programmable logic in a monolithic device. The innovative
Actel Fusion architecture can be used with ARM® Cortex™-M1 and ARM7 (CoreMP7) and 8051 (Core8051) cores and is the definitive Programmable System Chip
platform.
The Fusion family includes:
- Fusion
- M1 Fusion
- M7 Fusion
Key Features
- In-system configurable analog supports a wide variety of applications
- Up to 8 Mbits of user flash memory
- Extensive clocking resources
- Analog PLLs
- 1% RC oscillator
- Crystal oscillator circuit
- Real-Time Counter (RTC)
- Flash FPGA fabric
- Single chip
- Low power
- Secure
- Live at Power-Up (LAPU)
- Firm error immune
Product Table
| Fusion Devices |
AFS090 |
AFS250 |
AFS600 |
AFS1500 |
| ARM-Enabled Fusion Devices |
CoreMP71 |
|
|
M7AFS600 |
|
| Cortex-M12 |
|
M1AFS250 |
M1AFS600 |
M1AFS1500 |
| General |
|
|
|
|
|
| System Gates |
90,000 |
250,000 |
600,000 |
1,500,000 |
| Tiles (D-Flip-Flops) |
2,304 |
6,144 |
13,824 |
38,400 |
| Usable Tiles with CoreMP7S |
|
|
7,500 |
32,000 |
| Usable Tiles with CoreMP7Sd |
|
|
5,237 |
29,878 |
| Secure (AES) ISP |
Yes |
Yes |
Yes |
Yes |
| PLLs |
1 |
1 |
2 |
2 |
| Globals |
18 |
18 |
18 |
18 |
| Memory |
|
|
|
|
|
| Flash Memory Blocks (2 Mbits) |
1 |
1 |
2 |
4 |
| Total Flash Memory Bits (Mbits) |
2 |
2 |
4 |
8 |
| FlashROM Bits (kbits) |
1 |
1 |
1 |
1 |
| RAM Blocks (4,608 bits) |
6 |
8 |
24 |
60 |
| RAM (kbits) |
27 |
36 |
108 |
270 |
| Analog and I/Os |
|
|
|
|
|
| Analog Quads |
5 |
6 |
10 |
10 |
| Analog Input Channels |
15 |
18 |
30 |
30 |
| Gate Driver Outputs |
5 |
6 |
10 |
10 |
| I/O Banks (+ JTAG) |
4 |
4 |
5 |
5 |
| Maximum Digital I/Os |
75 |
114 |
172 |
252 |
| Analog I/Os |
20 |
24 |
40 |
40 |
| Speed Grades |
-F, Std., -1, -2 |
-F, Std., -1, -2 |
-F, Std., -1, -2 |
-F, Std., -1, -2 |
| Temperature Grades |
C, I |
C, I |
C, I |
C, I |
| I/Os: Single/Double-Ended (Analog) |
|
|
|
|
|
| QN108 |
37/9 (16) |
|
|
|
| QN180 |
60/16 (20) |
65/15 (24) |
|
|
| PQ208 |
|
93/26 (24) |
95/46 (40) |
|
| FG256 |
75/22 (20) |
114/37 (24) |
119/58 (40) |
119/58 (40) |
| FG484 |
|
|
172/86 (40) |
223/109 (40) |
| FG676 |
|
|
|
252/126 (40) |
- Notes:
-
- Refer to the CoreMP7 datasheet for more information.
- Refer to the Cortex-M1 product brief for more information.
Architecture Block Diagram
One Chip is All You Need
Until now, system designers were forced to choose costly and space-consuming
discrete analog components with programmable logic or mixed-signal ASIC
solutions to implement a typical system. Fixed architectures and other
technology barriers prevented the integration of individual components into
a single, low cost chip that met all design requirements.

Real World Interface
Fusion interfaces to the real world; up to 30 high-voltage-tolerant analog
inputs enable direct connection to signals from –12 V to +12 V, eliminating
the need for signal preconditioning. The Fusion analog to digital converter
(ADC) is configurable and supports resolutions up to 12 bits, and sample
rates up to 600 k samples per second (ksps). Fusion adds additional
functionality with the inclusion of multiple differential input current
monitor blocks, each with a built-in amplifier, increasing sensitivity and
efficiency. The Fusion integrated temperature monitor circuitry allows for
the monitoring of multiple remote temperatures with only an external diode
needed. Up to ten high current drive outputs are ideal for metal-oxide
semiconductor field-effect transistor (MOSFET) control and/or pulse
width modulation (PWM) functions such as direct fan control.

Analog-to-Digital Converter (ADC) Accuracy
Fusion offers better than 1% accuracy for the on-board ADC. Customers who design high-performance applications and need this level of accuracy can now take advantage of this feature as part of the design flow. The software design flow uses a soft calibration IP core and other Fusion features, such as embedded flash memory blocks, SRAM blocks, analog functions, the FPGA fabric, and an optional soft processor core to achieve this level of accuracy and a highly integrated and seamless calibration solution.
Power and Thermal Management
Fusion is Level 0 live at power-up (LAPU) and can be run from a single 3.3
V power supply. These simple startup requirements enable Fusion to act as
the ultimate system manager, capable of monitoring and sequencing
multiple power supplies to bring up your board in a controlled manner. The
ramp-rate of each power supply is programmable from the Fusion device.
Fusion easily integrates thermal management aspects of system control boards
by combining its temperature monitor and MOSFET/PWM capabilities.
Dynamic System Configuration
The ability of Fusion devices to support many system-level functions in a
single chip makes Fusion an ideal candidate for leading edge system
management protocols.
Fusion high performance flash memory blocks provide nonvolatile memory
flexibility to every aspect of your design. At system startup, the flash
memory can be used to initialize the system. SRAMs and registers can be
automatically loaded with data from the on-chip flash memory. Prior to
system shutdown, the volatile values in SRAM or registers on the Fusion
device can be saved back into the on-chip flash memory—saving the state
of the device for the next system startup (SAVE and RESTORE). The
Fusion flash memory also enables the dynamic changing
of system parameters (CONTEXT switch). System
boot codes can be stored in the flash memory for both
on-chip and off-chip requirements. The flash memory
can be configured to emulate EEPROM operation with
an available endurance extender IP. The optional use of
the soft IP Common Flash Interface (CFI) core from
Actel enables use of part of the flash memory for file storage.


Low Power
Built on a low power, high performance flash
process, Fusion provides industry leading low static
and dynamic power. Fusion also offers several sleep
and standby modes of operation to further extend
battery life in portable applications. The Fusion Real-
Time Counter (RTC) offers a wide variety of
functionality: sleep, standby, periodic wake-up, and
low speed/power operation. The addition of both a 1% RC oscillator and two-pin
crystal oscillator circuit eliminates the need for
expensive external clock sources.
Reconfiguring Systems
Inherent in the fabric of Fusion are the benefits of
configurability and field reprogrammability from the
successful Actel ProASIC®3 family of flash FPGA
devices. Fusion can be securely programmed late in the
manufacturing process or after it is in the field. By
enabling a single hardware platform to support
multiple projects and products, Fusion allows
designers to leverage economies of scale in purchasing,
while maintaining the ability to customize products for
different markets. Both the firmware (flash memory)
and hardware can be updated in a single step.
Fusion enabled FPGAs offer the best of both worlds.

| Technology Solutions |
 |
As the world's first mixed-signal FPGA family, Fusion integrates
mixed-signal analog, flash memory and FPGA fabric in a monolithic
PSC. Fusion does not require additional configuration nonvolatile memory
in order to load the device configuration data at every system power-up,
which reduces cost and increases security and system reliability.
Increased Fusion functionality can remove several additional components
from the board, such as flash memory, discrete analog ICs, clock
sources, EEPROM, and real-time clocks, thereby reducing system cost
and board space requirements. |
| User Nonvolatile Memory |
The Actel Fusion family is the only programmable logic solution
to include up to 8 Mbits of embedded flash memory. This high performance,
configurable flash memory supports 100 MHz operation and data bus
widths of 8, 16, and 32bits. When used in conjunction with either
a soft MCU on-chip or an external MCU, the flash memory offers an
excellent code space solution with the ability to execute in place,
eliminating the need to shadow code in RAM. Increasing overall data
reliability, the flash memory integrates error correction circuitry
(ECC) with single-bit error-fix and two-bit error-detect capabilities. |
 |
Maximizes power savings with very limited power-on current surge
and no high-current transition period, both of which occur on many
FPGAs. Fusion devices also have low static and dynamic power consumption,
further maximizing power savings. These devices support sleep and
standby modes of operation to greatly reduce power consumption. Another
unique feature of Fusion is the ability to dynamically shift between
normal clock speeds and low clock operation during periods of inactivity,
and switch back to full speed when needed. » More |
 |
Greatly simplifies system design, making the device available to
perform critical system setup tasks and reducing bill-of-materials
costs and PCB area. » More |
 |
Utilizes a 128-bit flash-based lock and inherent flash technology
features, providing the most impenetrable security for programmable
logic designs. This same encryption technology can be used to assure
secure updates to Fusion's embedded flash memory. » More |
 |
Flash cell configuration element cannot be altered by high-energy
neutrons and is therefore immune, unlike SRAM-based FPGAs. » More |
| Secure
ISP |
Supports a built-in AES decryption engine and industry-leading
flash-based AES-128 key for secure remote field updates over public
networks with encrypted bitstream. |
To support this new ground-breaking technology, Actel has developed a series of
major tool innovations to help maximize designer productivity. Implemented as
extensions to the popular Actel Libero IDE, these new tools will allow designers to easily instantiate and configure peripherals within a design, establish links between peripherals, create or import building blocks (Fusion applets) or reference designs, and perform hardware verification. This tools suite will also add comprehensive hardware/software debug features as well as a suite of utilities to simplify development of embedded soft processor-based solutions.
The all-inclusive
Fusion Starter Kit and M1-enabled Fusion Starter Kit contain everything you need to fully experiment with Fusion's Programmable System Chip capabilities. They provide a complete platform for the development of systems with Fusion or M1-enabled Fusion devices.
FlashPro3 programmer is targeted at the latest generation of flash devices to be offered by Actel: Fusion, M1 Fusion, and M7 Fusion devices. FlashPro3 supports a robust programming solution for the three regions of the Fusion device (FPGA core, flash blocks, and FlashROM).
Designs programmed into Fusion, M1 Fusion, and M7 Fusion devices can be debugged using logical analyzer software, working through the interface provided by the FlashPro3 programmer. The Identify Actel Edition (AE) software from Actel also enables the control and exercise of the architecture-specific features of Fusion, such as the ADC, the flash memory blocks, and the RTC, without the need to program a design into the FPGA core fabric itself.