|
Product Updates
|
Customer Portal
|
RSS
Home
Company
About Actel
Press Room
Events and Education
Investor Relations
Contact Us
Careers
Image Library
Products & Services
Devices
Processors
IP Cores
Design Software
Design Hardware
Solutions
Partners
Services
Buy Online
Documentation
Datasheets
Handbooks
Application Notes
User's Guides
Quality & Reliability
Package & Socket
Request SW & Lit
Downloads
Design Software
Program & Debug
Licensing
IBIS Models
BSDL Models
IP Evaluations
Design Examples
Support
Search
Knowledge Base
Webcasts
Training
My Cases
Customer Notifications
Product Updates
Low Power FPGAs
IGLOO Series Overview
IGLOO
IGLOO nano
IGLOO PLUS
ProASIC3 Series Overview
ProASIC3
ProASIC3 nano
ProASIC3L
Mixed Signal FPGAs
SmartFusion
Fusion
RadTolerant FPGAs
RTAX-S/SL
RTAX-DSP
RT ProASIC3
RTSX-SU
RT Legacy
Radiation & Reliability Data
Policies & Certifications
Antifuse FPGAs
Axcelerator
Product Features
Product Table
IP & Solutions
Design Software
Starter Kits & Programming
Documentation
Related Information
SX-A
eX
MX
Legacy FPGAs
ProASIC
PLUS
SX
ACT Series
Discontinued FPGAs
Product Information
Vertical Markets
Portable
Industrial Automation
Medical
Military & Aerospace
Automotive
Home
»
Products & Services
»
Devices
»
Axcelerator
» Documentation
Datasheets
Application Notes
Product Briefs
Product Information Brochures (PIB)
Power Calculator
Datasheets
Axcelerator Family FPGAs Datasheet
v2.8
(includes Military/Aerospace information)
General Description
(pages 1-14, PDF, 696 KB)
Detailed Specifications
(pages 1-91, PDF, 2.7 MB)
Packaging
(pages 1-114, PDF, 2.9 MB)
BGA Ball Maps
(ZIP, 200 KB)
6 MB
10/2009
Click on the
to rate this document
Packaging Data
Antifuse Package Selector Guide
647 KB
6/2009
Click on the
to rate this document
Hermetic Package Mechanical Configuration
24 KB
11/2003
Click on the
to rate this document
Package Mechanical Drawings
(v11.4)
3 MB
3/2010
Click on the
to rate this document
Package Thermal Characteristics and Weights
49 KB
10/2006
Click on the
to rate this document
Application Notes
AC163: Axcelerator Carry-Connect Macros App Note
118 KB
1/2003
Click on the
to rate this document
AC164: Axcelerator Family Memory Blocks App Note
151 KB
1/2003
Click on the
to rate this document
AC170: Prototyping RTAX-S Using Axcelerator Devices App Note
131 KB
4/2003
Click on the
to rate this document
AC173: Differences Between RTAX-S/SL and Axcelerator App Note
62 KB
5/2003
Click on the
to rate this document
AC175: Axcelerator Family PLL and Clock Management App Note
174 KB
6/2003
Click on the
to rate this document
AC177: Implementing Multi-Port Memories in Axcelerator Devices App Note
Source Code
(ZIP, 12 KB, 07/04)
186 KB
7/2003
Click on the
to rate this document
AC182: Axcelerator I/O Selection Guide App Note
362 KB
8/2003
Click on the
to rate this document
AC183: Using Global Resources in Actel's Axcelerator Family App Note
123 KB
8/2003
Click on the
to rate this document
AC184: Migrating from Engineering Silicon to Production Devices for the Axcelerator Family App Note
148 KB
8/2003
Click on the
to rate this document
AC201: Maximizing Logic Utilization in eX, SX, and SX-A FPGA Devices Using CC Macros App Note
112 KB
3/2004
Click on the
to rate this document
AC204: Designing Clean Analog PLL Power Supply in a Mixed-Signal Environment App Note
80 KB
5/2004
Click on the
to rate this document
AC209: Axcelerator Family Footprint Compatibility App Note
44 KB
7/2004
Click on the
to rate this document
AC210: Laser Range Finder Using Actel’s Axcelerator FPGA App Note
Design File
(ZIP, 345 KB, 07/04)
1 MB
7/2004
Click on the
to rate this document
AC211: 32-Channel Waveform Generator Implemented Using Actel's Axcelerator FPGA App Note
Design File
(ZIP, 1.2 MB, 07/04)
642 KB
7/2004
Click on the
to rate this document
AC212: Designing a SuperClock with an Axcelerator Device App Note
Design File
(ZIP, 130 KB, 09/04)
409 KB
9/2004
Click on the
to rate this document
AC217: IEEE Standard 1149.1 (JTAG) in the Axcelerator Family App Note
232 KB
2/2005
Click on the
to rate this document
AC218: Using Axcelerator RAM as Multipliers App Note
381 KB
2/2005
Click on the
to rate this document
AC225: Programming Antifuse Devices App Note
484 KB
11/2009
Click on the
to rate this document
AC228: EMPTY and FULL Flag Behaviors of the Axcelerator FIFO Controller App Note
713 KB
8/2005
Click on the
to rate this document
AC249: I/O Features in Axcelerator Family Devices App Note
Relative Pin Locations
(ZIP, 341 KB, 11/04)
1 MB
1/2006
Click on the
to rate this document
AC273: Using EDAC RAM for RadTolerant RTAX-S FPGAs and Axcelerator FPGAs App Note
– Applies to EDAC Core from Libero IDE v7.1 and Older
EDAC Core from Libero IDE v7.1 or Earlier
(ZIP, 41KB, 07/04)
256 KB
7/2006
Click on the
to rate this document
AC288: Using LVDS for Actel's Axcelerator and RTAX-S/SL Devices App Note
660 KB
10/2006
Click on the
to rate this document
AC319: Using EDAC RAM for RadTolerant RTAX-S/SL FPGAs and Axcelerator FPGAs App Note
– Applies to EDAC Core from Libero IDE v7.2 and Newer
EDAC Core from Libero IDE v7.2
(ZIP, 45 KB, 06/06)
691 KB
2/2008
Click on the
to rate this document
Product Briefs
Axcelerator Family FPGAs Product Brief
327 KB
10/2009
Click on the
to rate this document
Axcelerator Evaluation Platform
50 KB
8/2003
Click on the
to rate this document
Product Information Brochures (PIB)
Total System Power Brochure
482 KB
10/2008
Click on the
to rate this document
Single-Event Effects in FPGAs
306 KB
10/2007
Click on the
to rate this document
The Importance of Design Security Brochure
242 KB
4/2005
Click on the
to rate this document
Power Calculator
AX and RTAX-S/SL Power Calculator
149 KB
3/2010
Click on the
to rate this document