VHDL source for SmartFusion and SmartFusion2 simulation libraries is unavailable, and there is no plan to support this in future.
For these two device families, we only provide a Verilog source for the simulation model.
The pre-compiled libraries are marked as language neutral for ModelSim. As a result, these pre-compiled libraries can be used with ModelSim AE with either VHDL or Verilog designs.
If your simulator supports mixed language simulation (Verilog + VHDL), then you can use the Verilog library source files with your VHDL design.
Verilog simulation libraries source files location:
<Libero Installation directory>\Designer\lib\vlog
Pre-compiled simulation libraries location:
<Libero Installation directory>\Designer\lib\modelsim\precompiled
Note: Usage of ‘smartfusion.vhd’ file available under ..\lib\vtl\95 is not supported and discouraged.
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