SmartFusion
Libero IDE v9.0 introduces support for SmartFusion, Actel's newest generation flash technology FPGA. SmartFusion intelligent mixed-signal FPGAs are the only devices that integrate an FPGA, ARM Cortex-M3, and programmable analog, offering full customization, IP protection, and ease-of-use. Based on Actel’s proprietary flash process, SmartFusion FPGAs are ideal for hardware and embedded designers who need a true system-on-chip (SoC) that gives more flexibility than traditional fixed-function microcontrollers and without the excessive cost of soft processor cores on traditional FPGAs.
The Libero IDE flow for SmartFusion provides the classic Libero IDE FPGA design tools plus a SmartDesign Microcontroller Subsystem (MSS) Configurator that performs SmartFusion MSS hardware customization and extension into the SmartFusion fabric, where Actel and user-created IP are added to complete the full FPGA design. From that point, the standard Libero IDE synthesis, simulation, layout, timing/power, and FlashPro programming flows are used.
A Libero IDE configured SmartDesign MSS is fully compatible with Actel SoftConsole, Keil Microcontroller Design Kit (MDK), and IAR Embedded Workbench software development tools. Any of these tools can communicate with the SmartDesign MSS to create and debug the embedded software program. From the embedded software direction, a SoftConsole, Keil, or IAR Systems configured MSS can easily be imported into a Libero IDE SmartDesign project where the final FPGA hardware finishing touches are performed.
For optimal results using Libero IDE, SmartDesign, and SmartFusion, a full-time internet connection is required to access the latest versions of IP Cores, SmartFusion SmartDesign MSS, and SmartDesign MSS Help files. IP cores available on the release date are included on the Libero IDE v9.0 physical DVD for import into your project.
FlashPro SmartFusion Support
FlashPro v9.0 introduces support for SmartFusion, providing programming in the traditional Libero FPGA hardware design flow and supporting the SmartFusion Cortex M-3 embedded processor design flow.
Read the FlashPro v9.0 release notes.
FlashPro Design Debug
Libero IDE v9.0 also introduces new design debug features within FlashPro. FlashPro On-Chip Debug enables you to inspect specific software features within a programmed IGLOO, ProASIC3, SmartFusion, and Fusion family devices via the JTAG interface. FlashPro On-Chip Debug is launched using the Inspect Design button in the FlashPro software tool interface. On-Chip Debug features enable you to view the programmed contents of embedded FlashROM (eFROM), embedded nonvolatile memory (eNVM), and analog blocks to determine if the data is as expected. This feature is helpful for final design analysis prior to the FPGA system testing or production.
For the FlashROM, the On-Chip Debug reads the FlashROM data from the programmed FPGA device and automatically compares the data to the Libero IDE generated .pdb programming file. Any mismatch between the device data and the design file is automatically highlighted in the FlashROM inspection interface window.
For the embedded nonvolatile memory, the On-Chip Debug reads the eNVM content from the programmed FPGA device and displays the data to the user. Using the On-Chip Debug feature, you can compare content of the device data to the data from the LiberoIDE generated .pdb programming file. This read-only feature displays the programmed eNVM data per user client or per eNVM page address.
For the analog block, the On-Chip Debug feature enables you to perform a number of inquiries of the programmed Fusion analog block attributes, including the ability to inspect the analog block data on a channel per channel bases. The programmed FPGA device data can be compared to the Libero generated analog block configurations. Any mismatches are highlighted in the software.
The FlashPro On-Chip Debug also supports viewing of the device status such as device state, security settings, and power supply voltages supplied to the FPGA.
SoftConsole v3.1
SoftConsole v3.1 is available with Libero IDE v9.0 or as a standalone download. SoftConsole v3.1 supports the SmartFusion design flow and SmartFusion Cortex M-3 designs including direct interface to the SmartDesign MSS configurator, allowing a software developer to create and debug C and C++ executable system code completely independent of the FPGA hardware design flow. SoftConsole also supports a direct interface to the FlashPro v9.0 programming software, allowing the SmartFusion software designer direct programming and debug of the SmartFusion embedded software.
Read the SoftConsole v3.1 release notes for complete details of the release.
Updated Programming Algorithm for eX Devices
This software release features programming algorithm enhancements for the eX family of devices that can significantly improve the programming yield. Users of eX devices should regenerate their programming files with Libero IDE/Designer v9.0 to take advantage of this new programming algorithm. Programming files (.AFMs) generated with v9.0 are backwards compatible to Silicon Sculptor v3.90/v4.53.0 software. However, Actel recommends using the latest programming software for the best possible programming experience.
Updated Timing Data for RTAX4000D
The 18x18 math block in RTAX-DSP has an updated set of timing and power numbers based on parasitic extraction. Designs that have the math block in their critical path can expect to see a slow-down compared to the previous version of the software. Actel recommendeds that you rerun the static timing analysis in SmartTime to validate that designs meet timing requirements.
New Device and Packages
SmartFusion
| Die |
Package |
Speed Grade |
Temperature |
| A2F200M3F |
256 FBGA |
-1 |
COM, IND |
| 484 FBGA |
-1 |
COM, IND |
| A2F500M3G |
256 FBGA |
-1 |
COM, IND |
| 484 FBGA |
-1 |
COM, IND |
IGLOO
| Die |
Package |
Speed Grade |
Temperature |
| AGL250V2 |
284 CS |
Std. |
COM, IND |
| AGL250V5 |
Std. |
COM, IND |
| AGL400V2 |
284 CS |
Std. |
COM, IND |
| AGL400V5 |
Std. |
COM, IND |
IGLOO nano
| Die |
Package |
Speed Grade |
Temperature |
| AGLN060V2 |
81 CS |
Std. |
COM, IND |
| 100 VQFP |
Std. |
COM, IND |
| AGLN060V5 |
81 CS |
Std. |
COM, IND |
| 100 VQFP |
Std. |
COM, IND |
ProASIC3 nano
| Die |
Package |
Speed Grade |
Temperature |
| A3PN060 |
100 VQFP |
Std. |
COM, IND |
| -1 |
COM, IND |
| -2 |
COM, IND |
RT ProASIC3
| Die |
Package |
| Removed |
Added |
Added |
| RT3PE600L |
484 CCGA/LGA |
484 CCGA |
484 LGA |
| RT3PE3000L |
484 CCGA/LGA |
484 CCGA |
484 LGA |
| 896 CCGA/LGA |
896 CCGA |
896 LGA |
Programming File Generation
Programming file generation is added for the following devices:
New Libero IDE Download Process
The Libero download site now provides these download options:
- Web Installation is a new option that downloads a small executable program which opens to provide an interface for selecting the tools. This allows you to only download and install the Libero IDE tools that you want, minimizing disk space usage and installation time.
- A full Actel Software toolset downloaded as a single executable. Previously only available via DVD. Click the desktop icon to open the installer and select the tools needed for installation.*
- A zipped copy of the full Actel software toolset download noted above.*
* For Windows XP x64 users, Actel recommends using the Web Installation option only. If the Full Actel Software toolset version is desired, use the following procedure:
- From Control Panel, go to Administrative Tools
- Select Local Security Policy
- Select Software Restriction Policies
- If there are no policies set, click the Action menu and choose Create New Policies
- Double-click Enforcement in the right panel of Software Restriction Policies
- Select 'All users except local administrators'
All comments below are with respect to the SmartFusion design flow unless otherwise noted.
SmartFusion
25358 - Downsizing the package in a SmartFusion design causes Libero IDE to crash.
If you start a SmartFusion project using the FG484 package and then change to the FG256, Libero IDE will crash.
Workaround: Start your SmartFusion project with the FG256 package.
eNVM User Pages Usage
The MSS configurator uses a certain number of user eNVM pages to store the MSS configuration. These pages are located at the top of the eNVM address space. The number of pages is variable based on the user's MSS configuration (ACE, GPIOs and eNVM Init Clients). Your application code should not write in these user pages as it will most likely cause a runtime failure for your design. Note also that if these pages have been corrupted by mistake, the part will not boot again and will need to be re-programmed.
See the MSS eNVM Configurator User's Guide (in MSS Help) for more details.
SmartDesign MSS Configurator
24174 - Changing the configuration of an existing MSS I/O or GPIO PAD to a different port type results in a crash on generation of the MSS.
For example, if you configured an MSS I/O or GPIO PAD as a BIBUF, then changed it to an INBUF, then this will cause a crash on MSS generation.
Workaround: Install Libero IDE v9.0 SPA available March 15, 2010 to fix this issue. Alternately, change setting to Not Used and click OK to close the configurator. Then re-open it and change the MSS IO or MSS GPIO PAD configuration to the desired setting.
23800 - Closing SmartDesign MSS configurator by clicking the X at the upper right-hand corner of MSS dialog before closing a sub-block configurator causes a crash
Workaround: Close sub-configurator first.
20117 - Programming File Generator Error. Unable to read configuration. *.efc file is not generated.
Workaround: If you've copied the project to another location, the memory file paths that are specified in the eNVM configurator are invalid. You need to reopen the eNVM configurator and re-specify the file paths for the memory content files.
24345 - The Differential voltage monitor service within ACE cannot be sampled
Workaround: Install Libero IDE v9.0 SPA available March 15, 2010 to fix this issue.
24420 - ACE configurator does not allow specification of current threshold flags in the 50 µA range.
Workaround: Install Libero IDE v9.0 SPA available March 15, 2010 to fix this issue.
SmartDesign
23701 – Simulation fails.
Workaround: The MSS memory map has an address range of 0x40050000 to 0x400FFFFF for the fabric. The tool allows you to connect peripherals outside of this memory range. Check the Connecting User Logic to the SmartFusion Microcontroller Subsystem App Note for details on how to make valid connections between MSS and fabric peripherals.
SmartPower
Differences between SmartPower and SmartFusion datasheet
Operating mode:
- SOC: no differences
- Standby:
- Datasheet: This is an active mode. The MSS is in "Wait for Interrupt" at 32 KHz, the analog is off, and eNVM is in reset. The FPGA is on.
- SmartPower: This is a static mode with static power contribution.
- Sleep:
- Datasheet: Everything off except VCCI (optional), VCC33A and the LPXTAL
- SmartPower: Everything off except VCCI and VCC33A
- Power-down:
- Datasheet: Everything is off except VCC33A
- SmartPower: named "Shutdown": everything is off (0 static and dynamic)
- Time keeping:
- Datasheet: All rails off except VCCBAT
- SmartPower: This mode is not available
- FPGA:
- Datasheet: This mode is not available
- SmartPower: Similar to the standby mode as defined in the datasheet
Designer
24326 – Internal Error. Selecting the MSS core in the Chip Planner, causes the 'Route View' to crash
Workaround: There is no workaround. Do not click Route View when the MSS core is selected in Chip Planner.
24265 – Internal Error. High effort layout fails when a design has false path constraints on dangling pins (All Devices)
Workaround: Remove the false path constraints on the dangling pins and layout will succeed.
FlashPro SmartFusion Flow
25675 – Chain STAPL for SmartFusion design with STAPL file is incorrect
If you generate a chain STAPL with the STAPL file loaded with a SmartFusion device, it will result in an invalid chain STAPL file.
Workaround: Use the PDB file when exporting chain STAPL files.
23746 – FlashPro programming project settings appear to be 'reset' after re-launching FlashPro from the Libero IDE Project Manager.
Workaround: This situation occurs if you first run FlashPro without a fabric programming (*.fdb) file and then subsequently generate the FDB file in your Libero IDE project. FlashPro programming project settings (for security, programming selection, chain details, etc.) appear to be 'reset'. A second FlashPro project is in the Libero IDE project.
In FlashPro, re-load the first FlashPro project. (From the File menu, select 2 from the recent FlashPro project list). Now import the FDB file into your FlashPro project. Click the Modify button. On the FlashPoint window, toggle the FPGA Array checkbox to ON and click Import. Import the FDB file. Save the PDB and save your FlashPro project.
23720 – FlashPro starts up with 'Error: No regions' in the FlashPro log window
Workaround: When FlashPro starts from the Libero IDE Project Manager, FlashPro attempts to load the eFROM (*.ufc) configuration file automatically. In this situation, the eFROM configuration does not contain any regions.
Create a region in the eFROM configurator and regenerate your MSS design. The eFROM region can have just placeholder data if you do not intend to use the eFROM feature. From the MSS configurator, double-click the eFROM instance. In the Configure FlashROM Instance window, click and drag the cells in the table to select a region and then click Create to define the region, then click OK when done. Now re-generate the MSS design.
Close your previous FlashPro session and re-start FlashPro from Libero IDE.
If you do not want to use the eFROM, you can turn off programming of the eFROM configuration in the FlashPro project. Click the Modify button. On the FlashPoint window, toggle the FlashROM checkbox to OFF.
23987 - When attempting to use the permanent lock feature Save PDB generates message: "You must correct invalid data values before continuing…"
Workaround: Turn off the permanent lock setting and generate SmartFusion programming files without permanent lock feature.
23570 – Data reported through DEVICE_INFO action is incorrect for SmartFusion devices programmed with IAP
Workaround: None
23142 – In the FlashPoint window, the tooltip over the information icon next to the 'Specify I/O State during Programming' button incorrectly states I/O setting have been specified when they have not.
Workaround: You can verify the I/O settings by clicking the Specify I/O Settings During Programming button and viewing the I/O settings.
23423 – Error when using Inspect Device if JTAG chain is constructed by performing Auto-Chain Construction
If the JTAG chain is constructed automatically by selecting the Construct Chain Automatically in the Configuration Menu, and you click on the Inspect Device button, you will see the following error:
Error: Cannot initialize debug engine: Cannot initialize the programmer: No available Actel products found on USB port.
Workaround:
- Option 1: Construct the device chain by manually specifying the list of devices in the chain using the Add Actel Device or Add non-Actel Device options, and save the FlashPro project.
- Option 2: Manually resolve the device by selecting the Actel device that is in the chain, and save the FlashPro Project.
- Option 3: Load the programming file for the devices in the chain, execute read_idcode action in the programming files, and save the FlashPro Project.
Other FlashPro Known Issues (all products)
23592 - The device debug feature does not work if the chain is constructed through auto-chain-construction.
This happens because the software is not able to resolve the target device using JTAG IDCODE. The auto-chain-construction holds up the programming.
Workaround:
- Select the appropriate programming file, or manually resolve the device to a specific device.
- Savethe FlashPro project.
- Run Scan Chain, or execute read_idcode action in the programming file.
24344 - The DRC check is missing when the memory content file of eNVM client uses an obsolete path, and as a result, .efc file is not generated.
Workaround: Open the eNVM configurator within the MSS and fix the error related to the memory content file. Then, regenerate the MSS.
25918 - PROGRAM_NVM page address is incorrect on error code.
ERROR_CODE = 0x8080: On eNVM programming failure the page address reported is incorrectly reported and incremented by 1. This will be fixed in v9.0 SP1.
Workaround: Decrement the page address reported by 1.
25439 - FlashPro fails to export chain STAPL/SVF with Array and another feature (FROM, EFMB) (ProASIC3/E, IGLOO, SmartFusion, Fusion)
Chain STAPL/SVF fails when source programming file has an Array in addition to the FlashROM or EFMB (Embedded Flash Memory Block).
Workaround: Contact technical support. This will be fixed in v9.0 SP1 (June 2010).
24049 - Previously secured programming files with user pass key will erase the security when ERASE_ALL/ERASE action is run for IGLOO, ProASIC3, SmartFusion and Fusion devices.
Workaround: Do not use ERASE_ALL/ERASE action. Use separate actions to erase individual features. Use ERASE_ARRAY, if present, to only erase the array. Use ERASE_FROM, if present, to only erase the FlashROM.
24173 – Programming Error: Error on line xxx: syntax error.
Workaround: If using STAPL Player and your STAPL file programs or verifies the ARRAY. Do not generate STAPL file using Libero IDE/FlashPro v9.0. Use Libero IDE/FlashPro v8.6 SP1 or earlier STAPL files.
6871 - Cannot load the same PDB for multiple devices or copy and paste
Workaround: Use STAPL files. Generate STAPL files from Libero IDE or FlashPro.
6859 - When using FlashPro programmer with Windows Vista operating system, the Refresh/Rescan may remove the programmer from the programmer list
Workaround: Restart the FlashPro software. This action will refresh the list of programmers.
52280 - Parallel FlashPro programming is not a supported programming mode
Parallel programming via USB 1.1 with FlashPro programmers (not FlashPro3) is disabled. If you attempt to program using parallel FlashPro programmers, a message will alert you that this is not possible. Use only one FlashPro programmer at a time for programming.
24433 - IEEE 1532 programming Error on line xxx: syntax error. No associated test data register for instruction U_ACTIVE.
Workaround: 1532 programming files generated using v8.6 SP1 or v9.0 have syntax errors. Use 1532 programming files from v8.6 release.
FlashPro BSDL Files
24624 - Fusion design specific BSDL files created from Libero IDE v9.0 are invalid.
Workaround: This issue is fixed in Libero IDE v9.0 SP1.
