Designer v8.0 SP2 Release Notes
(Oct 16, 2007)
Thank you for your interest in Actel's Designer v8.0 Service Pack 2 FPGA Physical Implementation Software.
IGLOO: Introducing Cortex-M1 Support
This release introduces Cortex-M1 software support for IGLOO. The M1AGL600 is the first of many devices. Programming File (PDB/STAPL) generation is also enabled for the M1AGL600. SP2 includes these IGLOO device/package features:
| New Device/Package |
Packages |
Speed Grade |
Comments |
M1AGL600V2
M1AGL600V5 |
FG144
FG256
FG484 |
STD |
Includes Programming File Generation |
AGL030V2
AGL030V5 |
CS81 |
STD |
|
AGL125V2
AGL125V5 |
CS196 |
STD |
Includes Programming File Generation |
| Package Updates Only |
Packages |
Requires Re-Compile* |
AGL030V2
AGL030V5 |
VQ100
QN132 |
Yes |
AGL125V2
AGL125V5 |
VQ100
QN132
FG144 |
Yes |
* Existing designs with .adb files will be automatically invalidated and taken back pre-compile state. Designs must be re-compiled and re-run through Layout.
ProASIC 3: Introducing Automotive Temperature Range Support
This release introduces 2 temperature ranges supporting automotive product applications
- T-Grade 1: -40°C to Automotive AECQ Class 1 (125 Ambient) extended temp; (Absolute MAX Junction offering 135°C)
- T-Grade 2: -40°C to Automotive AECQ Class 2 (105 Ambient) standard offering; (Absolute Max Junction 115°C)
- The following devices and packages are supported with Grades 1 and 2 temperature range.
NOTE: T-Grade 1 and T-Grade 2 does not support LVCMOS25 I/O selection with either 4 mA or 8 mA drive strength. Do not use LVCMOS25 4 or 8 mA drive strength when using T-Grade 1 or T-Grade 2 for the supported devices.
| New Device/Package |
Packages |
Speed Grade |
| A3P060 |
VQ100
FG144 |
STD, -1 |
| A3P125 |
VQ100
FG144 |
STD, -1 |
| A3P250 |
VQ100
FG144
FG256 |
STD, -1 |
| A3P1000 |
FG144
FG256
FG484 |
STD, -1 |
SP2 includes these ProASIC3 device/package features:
| New Device/Package |
Packages |
Speed Grade |
Comments |
| A3P600 |
|
STD |
Adds Programming File Generation |
| A3P1000 Mil Temp Range |
FG144 |
STD, -1 |
|
| Package Updates Only |
Packages |
Requires Re-Compile* |
| A3P030 |
VQ100
QN132 |
Yes |
* Existing designs with .adb files will be automatically invalidated and taken back pre-compile state. Designs must be re-compiled and re-run through Layout.
ProASIC3E Device/Package Features
| New Device/Package |
Packages |
Speed Grade |
Comments |
| M1A3PE1500 |
PQ208
FG484
FG676 |
STD, -1, -2, -F |
Includes Programming File Generation |
ProASIC3E A3PE1500 Programming File Generation Requirements
A3PE1500 pre-v8.0 SP2 programming files and need to be regenerated using Libero IDE/Designer v8.0 SP2 and FlashPro v6.0 SP2. There is no warning from Designer or FlashPro that this needs to be done. Failure to regenerate the programming file with Libero IDE/Designer v8.0 SP2 and FlashPro v6.0 SP2 may result in a non-functional device.
FlashPro v6.0 Service Pack 2
FlashPro v6.0 SP2 is required to program devices where programming file generation is enabled in Libero IDE v8.0 SP2.
Obsolescence notice for Windows 2000, Solaris 8, and Linux RedHat 3.0.
For more information, view the complete System Requirements.
Designer v8.0 SP2 requires a current Designer v8.0 license.
Register for a free Designer Evaluation or Gold license, or contact your local Actel Sales office to purchase a Designer Platinum license.
Unless otherwise noted, these issues apply to all devices.
Synplify/Synplify Pro AE Support for Cortex-M1 Devices
The current version of Synplify/Synplify Pro AE (8.8A1) does not provide support for Cortex-M1 supported devices.
When Synplify/Synplify Pro AE is launched from the project, a message is displayed that the device is not recognized. Synplify/Synplify Pro AE will open using the same family (e.g. ProASIC3) and the smallest device within that family. You should open the Implementation Options dialog box and select the device of the same size (e.g. A3P1000 for M1A3P1000).
Automotive Temperature Range Support (A3P)
68539a - I/O drive strength
Temperature Grade 1 and Temperature Grade 2 does not support LVCMOS25 I/O selection with either 4 mA or 8 mA drive strength. Do not use LVCMOS25 4 or 8 mA drive strength when using T-Grade 1 or T-Grade 2 for the supported devices.
68539b - RAM-FIFO
Any Automotive A3P060 and A3P125 design using any RAM or FIFO macro other than the single-port RAM and the dual-port RAM specified below will fail compile because these RAM and FIFO configurations are not supported for these devices.
- Single-port RAM: either of the clock inputs of the RAM (CLKA or CLKB in RAM4k9, RCLK or WCLK in RAM512x18) is tied off (to VCC or GND).
- Dual-port RAM where the 2 clock inputs of the RAM are of opposite polarity but from the same source. You will see the following error message:
Error: CMP448: This design contains RAM or FIFO configuration that is not supported for the device and temperature range you have selected. Please contact Actel Technical support for further details.
68539c - Temperature settings
The software will not allow you to change the temperature range for A3P060 or A3P125 from COM/IND/CUSTOM to TGrade1/TGrade2 if the design contains any FIFO or RAM macro other than the single-port and dual-port RAM specified above. You will see the following error message:
Error: CMP448: This design contains RAM or FIFO configuration that is not supported for the device and temperature range you have selected. Please contact Actel Technical support for further details.
68797 – IGLOO default I/O selection change
The default I/O technology for the IGLOO/e family is now LVCMOS15, with an output
load capacitance of 5 pf.
Designer
68634 – Existing IGLOO/e adb files will be automatically be
invalidated and must be recompiled. The following message
will be displayed:
To achieve the lowest power
on the IGLOO/e part, you need to re-run compile on your design.
SmartTime
66042 - Missing OCLK-EOUT arc in IOREG of IGLOO 1.2v (IGLOO/e)
For IGLOO/e 1.2V devices, the timing arc in the SDF will report a wrong value
if an I/O register is combined. Only the enable register is affected. Input
and output registers have the correct value.
67337 – "Maximum" analysis in bottleneck report is generated for "Minimum" analysis
