Actel

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1. What is ProASIC3?
ProASIC3 is the new third-generation of Actel high-performance flash FPGAs. The ProASIC3 family of FPGAs delivers the world's lowest unit and total system cost. The 0.13µ, flash-based CMOS ProASIC3 family combines the advantages of ASIC design and the benefits of a programmable device that is nonvolatile. ProASIC3 has the following attributes:

2. What do the ProASIC3/E devices bring to the industry?
ProASIC3/E devices are the world's lowest cost FPGA solutions, offering seven devices for under $10. The devices, which meet the 64-bit 66 MHz PCI benchmark, offer equal or better performance than competitive mainstream SRAM-based FPGAs. With its low price, large number of system gates, high performance and ASIC-like design flow and methodology, the Actel ProASIC3/E devices offer solutions for a broad range of applications including those traditionally served by ASICs. In fact, for the first time, designers have a reprogrammable solution that combines the low-cost, single-chip, nonvolatile and power-friendly features of an ASIC with the fast time-to-market and lack of NREs typically associated with FPGAs.

More specifically, the new ProASIC3/E FPGAs are well suited to many applications because these are nonvolatile, reprogrammable, single-chip and live-at-power-up solutions. Therefore, ProASIC3/E FPGAs significantly simplify system design and reduce total system cost considerations. For example, in consumer applications, the multiple benefits of security, on-chip nonvolatile memory, single chip, high performance and live at power-up provide a compelling feature set at ASIC-like prices. The communications sector requires large amounts of logic and memory in addition to maximum design security. In the avionics arena, FAA regulations promote nonvolatile, programmable logic solutions like ProASIC3/E.

3. How do the ProASIC3 and ProASIC3E devices differ from one another?
The ProASIC3 family of devices includes both ProASIC3 and ProASIC3E devices that have a comparable core cell, routing, FlashROM (FROM), and secure in-system programmability (ISP). ProASIC3 devices support a single PLL and popular I/Os such as single-ended standards and LVDS for cost-optimized designs. ProASIC3E targets the high-end FPGA market by supporting up to six PLLs, voltage-referenced standards through the inclusion of Pro I/O, high-logic density and the number of I/Os.

Features of ProASIC3: Features of ProASIC3E:

4. How do the ProASIC3/E devices differ from the ProASICPLUS devices?
The Actel ProASIC3/E devices are the industry's lowest cost FPGA solutions, and offer enhanced performance over the ProASICPLUS family. ProASIC3 is the first family of FPGAs with on-chip user nonvolatile flash memory, offers more devices and higher densities - between 30 k and 3 million system gates. The ProASIC3 is based on an advanced 130 nm, 7-layer metal, flash-based LVCMOS process. ProASIC3/E devices also feature technology leading integrated secure ISP functionality (using AES decryption). The single-chip, live at power-up flash architecture also enables Actel to deliver the industry's lowest total system costs.

5. How does the ProASIC3/E family address security requirements?
Unlike SRAM-based FPGAs or conventional ASIC solutions, ProASIC3/E devices offer one of the highest levels of design security in the industry. In fact, ProASIC3/E devices bring new levels of security to the FPGA market place. An FPGA industry first, secure ISP is performed using the industry-standard 128- bit AES block cipher algorithm. Reprogramming can be securely performed in-system to support future design iterations and field upgrades with peace of mind that valuable IP cannot be compromised or copied .

Additionally, Actel ProASIC3/E devices include a FlashLock™ feature that prevents the read back of the programming bitstream. This unique feature provides a tamper-resistant solution ensures that the function of the device cannot be altered by unauthorized individuals. Additionally, on-board security mechanisms prevent access to the programming information from noninvasive attacks. Invasive attacks, including decapping and stripping of the device, only reveals the structure of the devices, not the contents of the flash cells.

6. What are the design methodologies and tools that support the ProASIC3 family?
The ProASIC3/E devices are supported by Actel Libero® Integrated Design Environment (IDE) software, version 6.1, which includes place-and-route, timing analysis, and memory generation functionality. The devices are also supported by third-party design tools from Synplicity, Mentor Graphics, SynaptiCAD and Magma Design Automation. Because the ProASIC3/E devices work equally well with ASIC and FPGA design methodologies, designers can create high-density systems using existing tools and flows.