Actel's ProASIC3L Family Balances Low Power, Speed and Low Cost
Flash-based FPGA Family Delivers Dramatically Reduced Dynamic and Static Power
MOUNTAIN VIEW, Calif., January 07, 2008 —
Further
extending its industry-leading portfolio of low-power programmable
solutions, Actel Corporation today introduced the ProASIC3L family
of field-programmable gate arrays (FPGAs) for designers of high-performance,
power-conscious systems. Featuring 40 percent lower dynamic power and
90 percent lower static power than its previous-generation ProASIC3 FPGAs,
the new flash-based family combines dramatically reduced power consumption
with up to 350MHz operation. As a result, designers in high-performance
market segments, such as industrial, medical and scientific, now have
access to flexible, feature-rich solutions that offer speed, low power
and low cost. The ProASIC3L family also supports the free implementation
of an FPGA-optimized 32-bit ARM Cortex-M1 processor,
allowing system designers to select the Actel flash-based FPGA solution
that best meets their speed and power design requirements regardless
of application or volume.
"The importance of power consumption is not a question, but a statement
of fact," said Fares Mubarak, senior vice president at Actel. "As
process technology nodes shrank, static power became a major concern.
However, over the past few years, Actel has dramatically reduced static
power dissipation, allowing us to intensify our focus on dynamic power,
which now accounts for a larger portion of the power budget. Actel's
new ProASIC3L family offers the unique combination of low dynamic and
static dynamic power with high performance."
Dynamic power is critical in applications where clocks are constantly
switching and providing input to an FPGA, such as high-speed data pipelines
for portable video and medical appliances. Like the company's award-winning
5-microwatt (µW) IGLOO FPGA
family, the ProASIC3L devices support a 1.2V core voltage and Actel's
innovative Flash*Freeze technology. Flash*Freeze enables designers
to quickly switch the device from dynamic operation to static without
switching off clocks or power supplies. In a typical high-speed design
using comparable one-million gate FPGAs, SRAM-based competitive solutions
consume 60 percent higher dynamic power and 100 times more static power
than the ProASIC3L devices, which consume just 100mA of dynamic power
and 1mW of static power.
Based on Actel's successful ProASIC3 architecture, the ProASIC3L
family is comprised of four family members ranging from 250,000 to
three million gates: the A3P250L, A3P600L, A3P1000L and A3PE3000L.
Offered in both commercial and industrial temperature grades, the devices
feature embedded SRAM memory, high I/O counts, phase-locked loops (PLLs)
and nonvolatile memory.
M1-enabled ProASIC3L
Free of the license and royalty fees typically associated with industry-leading
processor cores, Actel is initially offering the 32-bit ARM Cortex-M1
processor for use in its 600,000-gate ProASIC3L device, the M1A3P600L.
Operating at up to 70 MHz and consuming 32 percent of available chip
real estate, the highly configurable processor provides a good balance
between size and speed, while offering space for customization.
Tool Support
The ProASIC3L family is supported by the Actel Libero™ Integrated
Design Environment (IDE) version 8.2. The Libero IDE includes
sophisticated power-driven layout and analysis tools to further reduce
dynamic power and provide users with a comprehensive understanding
of power usage in all functional modes of a design. By using power-driven
layout rather than timing-driven layout, system designers can reduce
dynamic power by as much as 30 percent.
Surpassing the knowledge and support offered for proprietary processors,
the Cortex-M1 processor is supported by Actel as well as third-party
tools — from compilers and debuggers to RTOS support. Actel supports
the Cortex-M1 processor with the Actel Libero IDE as well as its CoreConsole and SoftConsole environments — all
available for free download from Actel's Web site.
Actel will offer ProASIC3L and an M1-enabled ProASIC3L starter kits
to enable designers to quickly evaluate the family and prototype their
low-power design. Detailed current-monitoring capabilities allow users
to directly measure the low-current consumption and validate the design's
performance when using ProASIC3L or M1-enabled ProASIC3L devices.
Pricing and Availability
The ProASIC3L family is sampling now. Pricing for the ProASIC3L family,
including the M1-enabled devices, starts at $3.95 in volume. The M1A3P600L
will also be available in Q1 2008 with the three remaining M1-enabled
family members slated for Q2 and Q3 2008. Version 8.2 of the Actel
Libero IDE will be available in Jan 2008. The two ProASIC3L starter
kits will be available in Q1 2008. For further information about pricing
and availability, please contact
Actel or visit the company's Web site at www.actel.com.
About Actel
Attacking power consumption from both the chip and the system levels,
Actel Corporation's innovative FPGAs and programmable system chip
solutions enable power-efficient design. The company is traded on
the NASDAQ National Market under the symbol ACTL and is headquartered
at 2061 Stierlin Court, Mountain View, Calif., 94043-4655. For more
information about Actel, visit http://www.actel.com.
Contact: Stephanie Mrus, Actel Corporation, 650.318.4614
