IP Module - CoreABC
CoreABC is a simple, low gate count controller for the advanced peripheral bus (APB) devices. In particular, it is targeted at controlling CoreAI and CorePWM in Fusion applications, but it can be used to control any APB bus IP core. The instructions executed are either held in a small internal ROM constructed from logic tiles ("hard" configuration), or stored in RAM blocks internal to CoreABC ("soft" configuration). The RAM blocks can be initialized using the embedded Flash memory within the Fusion family. The core is easy to configure and program offering efficient local control for use in real-time applications in Actel FPGAs.

The core consists of six main blocks:
- Instruction block
- sequencer
- ALU and flags
- storage
- ACM
- APB controller
Key Features:
- Deterministic operation
- Very fast real-time I/O response
- Hard or soft program code storage
- Low cost control implementation
- Can be used in devices without on-chip memory
- Highly configurable
- 8-, 16- or 32-bit APB interface
- Easy to implement and program
- Supports Actel's ProASIC3, Fusion, IGLOO, AX, and RTAX families